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Texture templates downloads.. Second Life copybot viewers forum offers free 3d virtual world items, copybhot viewers and a place where’s planet earth is still officially free.1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device having a gate electrode with a steep side wall shape and a manufacturing method thereof.
2. Description of the Related Art
In recent years, with the increase in integration density of semiconductor integrated circuits, elements have become smaller and thinner. Since the gate length of elements has become shorter, the length of a channel is also becoming shorter. Thus, the concentration of an impurity near a channel region greatly affects the threshold voltage. Therefore, in order to control the threshold voltage, it is important to control the impurity distribution near a channel region, particularly near a surface.
A method of controlling the threshold voltage by applying a stress to a channel is also known. For example, a method of applying a tensile stress to a channel for holes is known as a positive channel transistor (PCT) or a buried channel transistor (BCT). Meanwhile, a method of applying a compressive stress to a channel for electrons is known as a negative channel transistor (NCT) or a surface channel transistor (SCT).
Methods of applying stresses such as those described above to the channel of a semiconductor device are disclosed in, for example, Japanese Patent Laid-Open Nos. H5-122336, H5-145840, and H6-77576, Japanese Patent Laid-Open Nos. 2000-46127 and 2001-100824, and Japanese Patent Laid-Open No. 2003-096038.
An increased concentration of an impurity near a channel causes the threshold voltage to shift to a low-voltage side. In order to decrease the concentration of the impurity near the channel, a method of applying a strong electric field
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